V. V. Belkin, S. G. Sharshunov. ISA Based Functional Test Generation with Application to Self-Test of RISC Processors. In Matteo Sonza Reorda, Ondrej Novák, Bernd Straube, Hana Kubatova, Zdenek Kotásek, Pavel Kubalík, Raimund Ubar, Jiri Bucek, editors, Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), Prague, Czech Republic, April 18-21, 2006. pages 75-76, IEEE Computer Society, 2006.
@inproceedings{BelkinS06,
title = {ISA Based Functional Test Generation with Application to Self-Test of RISC Processors},
author = {V. V. Belkin and S. G. Sharshunov},
year = {2006},
tags = {rule-based, testing},
researchr = {https://researchr.org/publication/BelkinS06},
cites = {0},
citedby = {0},
pages = {75-76},
booktitle = {Proceedings of the 9th IEEE Workshop on Design \& Diagnostics of Electronic Circuits \& Systems (DDECS 2006), Prague, Czech Republic, April 18-21, 2006},
editor = {Matteo Sonza Reorda and Ondrej Novák and Bernd Straube and Hana Kubatova and Zdenek Kotásek and Pavel Kubalík and Raimund Ubar and Jiri Bucek},
publisher = {IEEE Computer Society},
isbn = {1-4244-0185-2},
}