Manuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia. Gate-level simulation of CMOS circuits using the IDDM model. In International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia. pages 483-486, IEEE, 2001. [doi]
@inproceedings{BellidoJRAV01,
title = {Gate-level simulation of CMOS circuits using the IDDM model},
author = {Manuel J. Bellido and Jorge Juan-Chico and Paulino Ruiz-de-Clavijo and Antonio J. Acosta and Manuel Valencia},
year = {2001},
doi = {10.1109/ISCAS.2001.922090},
url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.2001.922090},
researchr = {https://researchr.org/publication/BellidoJRAV01},
cites = {0},
citedby = {0},
pages = {483-486},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia},
publisher = {IEEE},
isbn = {0-7803-6685-9},
}