Manuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia. Gate-level simulation of CMOS circuits using the IDDM model. In International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia. pages 483-486, IEEE, 2001. [doi]
Abstract is missing.