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Unifying Wire and Time Scheduling for Highlevel Synthesis

Yosi Ben-Asher, Irina Lipov. Unifying Wire and Time Scheduling for Highlevel Synthesis. In 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2018, Hanoi, Vietnam, September 12-14, 2018. pages 28-35, IEEE Computer Society, 2018. [doi]

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Yosi Ben-Asher

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Irina Lipov

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