Finding the Best Compromise in Compiling Compound Loops to Verilog

Yosi Ben-Asher, Eddie Shochat. Finding the Best Compromise in Compiling Compound Loops to Verilog. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France. pages 495-498, IEEE Computer Society, 2008. [doi]

Authors

Yosi Ben-Asher

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Eddie Shochat

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