Yosi Ben-Asher, Eddie Shochat. Finding the Best Compromise in Compiling Compound Loops to Verilog. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France. pages 495-498, IEEE Computer Society, 2008. [doi]
@inproceedings{Ben-AsherS08,
title = {Finding the Best Compromise in Compiling Compound Loops to Verilog},
author = {Yosi Ben-Asher and Eddie Shochat},
year = {2008},
doi = {10.1109/ISVLSI.2008.10},
url = {http://dx.doi.org/10.1109/ISVLSI.2008.10},
tags = {compiler},
researchr = {https://researchr.org/publication/Ben-AsherS08},
cites = {0},
citedby = {0},
pages = {495-498},
booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France},
publisher = {IEEE Computer Society},
}