A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits

Luca Benini, Alberto Bocca, Alberto Bonanno, Alberto Macii, Enrico Macii, Jean-Luc Nagel, Christian Piguet, Massimo Poncino. A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits. J. Low Power Electronics, 6(1):44-55, 2010. [doi]

Abstract

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