Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi. Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks. In European Design and Test Conference (ED&TC 97), Paris, France, 17-20 March 1997. pages 514-520, IEEE, 1997. [doi]
Abstract is missing.