Achieving Sub 100 DPPM Defect Levels on VDSM and Nanometer ASICs

Brady Benware. Achieving Sub 100 DPPM Defect Levels on VDSM and Nanometer ASICs. In Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA. pages 1418, IEEE, 2004. [doi]

Abstract

Abstract is missing.