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Yngvar Berg, Tor Sverre Lande. Area efficient circuit tuning with floating-gate techniques. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 396-399, IEEE, 1999. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A low-voltage sinc/sup 2/ decimator implemented by a new circuit technique using floating-gate MOS transistorsMats Høvin, Dag T. Wisland, Yngvar Berg, Tor Sverre Lande. iscas 2002: 397-400 [doi]
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