RF performance of Standard, High-Resistivity and Trap-Rich Silicon substrates down to cryogenic temperature

Q. Berlingard, M. Moulin, J.-P. Michel, T. Fache, I. Charlet, C. Plantier, Z. Chalupa, Jose Lugo-Alvarez, Jean-Pierre Raskin, Louis Hutin, Mikaël Cassé. RF performance of Standard, High-Resistivity and Trap-Rich Silicon substrates down to cryogenic temperature. In 53rd IEEE European Solid-State Device Research Conference, ESSDERC 2023, Lisbon, Portugal, September 11-14, 2023. pages 148-151, IEEE, 2023. [doi]

@inproceedings{BerlingardMMFCPCLRHC23,
  title = {RF performance of Standard, High-Resistivity and Trap-Rich Silicon substrates down to cryogenic temperature},
  author = {Q. Berlingard and M. Moulin and J.-P. Michel and T. Fache and I. Charlet and C. Plantier and Z. Chalupa and Jose Lugo-Alvarez and Jean-Pierre Raskin and Louis Hutin and Mikaël Cassé},
  year = {2023},
  doi = {10.1109/ESSDERC59256.2023.10268536},
  url = {https://doi.org/10.1109/ESSDERC59256.2023.10268536},
  researchr = {https://researchr.org/publication/BerlingardMMFCPCLRHC23},
  cites = {0},
  citedby = {0},
  pages = {148-151},
  booktitle = {53rd IEEE European Solid-State Device Research Conference, ESSDERC 2023, Lisbon, Portugal, September 11-14, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-0423-7},
}