Florent Berthelot, Fabienne Nouvel. Partial and Dynamic Reconfiguration of FPGAs: a top down design methodology for an automatic implementation. In 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany. pages 436-437, IEEE Computer Society, 2006. [doi]
@inproceedings{BerthelotN06,
title = {Partial and Dynamic Reconfiguration of FPGAs: a top down design methodology for an automatic implementation},
author = {Florent Berthelot and Fabienne Nouvel},
year = {2006},
doi = {10.1109/ISVLSI.2006.71},
url = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2006.71},
tags = {design},
researchr = {https://researchr.org/publication/BerthelotN06},
cites = {0},
citedby = {0},
pages = {436-437},
booktitle = {2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany},
publisher = {IEEE Computer Society},
isbn = {0-7695-2533-4},
}