Partial and Dynamic Reconfiguration of FPGAs: a top down design methodology for an automatic implementation

Florent Berthelot, Fabienne Nouvel. Partial and Dynamic Reconfiguration of FPGAs: a top down design methodology for an automatic implementation. In 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany. pages 436-437, IEEE Computer Society, 2006. [doi]

Abstract

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