Deterministic seed selection and pattern reduction in Logic BIST

Ramesh Bhakthavatchalu, Sreeja Krishnan, V. Vineeth, M. Nirmala Devi. Deterministic seed selection and pattern reduction in Logic BIST. In 18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014. pages 1-2, IEEE, 2014. [doi]

@inproceedings{BhakthavatchaluKVD14,
  title = {Deterministic seed selection and pattern reduction in Logic BIST},
  author = {Ramesh Bhakthavatchalu and Sreeja Krishnan and V. Vineeth and M. Nirmala Devi},
  year = {2014},
  doi = {10.1109/ISVDAT.2014.6881039},
  url = {http://dx.doi.org/10.1109/ISVDAT.2014.6881039},
  researchr = {https://researchr.org/publication/BhakthavatchaluKVD14},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014},
  publisher = {IEEE},
  isbn = {978-1-4799-5088-1},
}