Ramesh Bhakthavatchalu, Sreeja Krishnan, V. Vineeth, M. Nirmala Devi. Deterministic seed selection and pattern reduction in Logic BIST. In 18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014. pages 1-2, IEEE, 2014. [doi]
Abstract is missing.