Current Collapse Reduction Technique Using N-Doped Buffer Layer into the Bulk Region of a Gate Injection Transistor - researchr publication

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Koushik Bharadwaj, Ashok Ray, Sushanta Bordoloi, Gaurav Trivedi. Current Collapse Reduction Technique Using N-Doped Buffer Layer into the Bulk Region of a Gate Injection Transistor. In 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems, VLSID 2019, Delhi, India, January 5-9, 2019. pages 494-495, IEEE, 2019. [doi]

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