Statistical leakage minimization through joint selection of gate sizes, gate lengths and threshold voltage

Sarvesh Bhardwaj, Yu Cao, Sarma B. K. Vrudhula. Statistical leakage minimization through joint selection of gate sizes, gate lengths and threshold voltage. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 953-958, IEEE, 2006. [doi]

Abstract

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