Debjyoti Bhattacharjee, Anirban Majumder, Anupam Chattopadhyay. In-memory realization of SHA-2 using ReVAMP architecture. In 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, VLSID 2021, Guwahati, India, February 20-24, 2021. pages 47-53, IEEE, 2021. [doi]
@inproceedings{BhattacharjeeMC21,
title = {In-memory realization of SHA-2 using ReVAMP architecture},
author = {Debjyoti Bhattacharjee and Anirban Majumder and Anupam Chattopadhyay},
year = {2021},
doi = {10.1109/VLSID51830.2021.00013},
url = {https://doi.org/10.1109/VLSID51830.2021.00013},
researchr = {https://researchr.org/publication/BhattacharjeeMC21},
cites = {0},
citedby = {0},
pages = {47-53},
booktitle = {34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, VLSID 2021, Guwahati, India, February 20-24, 2021},
publisher = {IEEE},
isbn = {978-1-6654-4087-5},
}