Soumendu Bhattacharya, Abhijit Chatterjee. High Coverage Analog Wafer-Probe Test Design and Co-optimization with Assembled-Package Test to Minimize Overall Test Cost. In 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA. pages 89-100, IEEE Computer Society, 2003. [doi]
Abstract is missing.