Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes

Mayukh Bhattacharya, Pinaki Mazumder. Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes. In 8th Great Lakes Symposium on VLSI (GLS-VLSI 98), 19-21 February 1998, Lafayette, LA, USA. pages 65-70, IEEE Computer Society, 1998. [doi]

@inproceedings{BhattacharyaM98,
  title = {Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes},
  author = {Mayukh Bhattacharya and Pinaki Mazumder},
  year = {1998},
  url = {http://csdl.computer.org/comp/proceedings/glsvlsi/1998/8409/00/84090065abs.htm},
  tags = {logic},
  researchr = {https://researchr.org/publication/BhattacharyaM98},
  cites = {0},
  citedby = {0},
  pages = {65-70},
  booktitle = {8th Great Lakes Symposium on VLSI (GLS-VLSI  98), 19-21 February 1998, Lafayette, LA, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-8409-7},
}