Timing challenges in high-speed interleaved ΔΣ DACs

Ameya Bhide, Atila Alvandpour. Timing challenges in high-speed interleaved ΔΣ DACs. In 2014 International Symposium on Integrated Circuits (ISIC), Singapore, December 10-12, 2014. pages 46-49, IEEE, 2014. [doi]

Abstract

Abstract is missing.