Design of ultra-low-leakage logic gates and flip-flops in high-performance FinFET technology

Ajay N. Bhoj, Niraj K. Jha. Design of ultra-low-leakage logic gates and flip-flops in high-performance FinFET technology. In Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011, Santa Clara, California, USA, 14-16 March 2011. pages 695-702, IEEE, 2011. [doi]

Abstract

Abstract is missing.