An area-efficient 6T-SRAM based Compute-In-Memory architecture with reconfigurable SAR ADCs for energy-efficient deep neural networks in edge ML applications

Avishek Biswas, Hetul Sanghvi, Mahesh Mehendale, G. Preet. An area-efficient 6T-SRAM based Compute-In-Memory architecture with reconfigurable SAR ADCs for energy-efficient deep neural networks in edge ML applications. In IEEE Custom Integrated Circuits Conference, CICC 2022, Newport Beach, CA, USA, April 24-27, 2022. pages 1-2, IEEE, 2022. [doi]

@inproceedings{BiswasSMP22,
  title = {An area-efficient 6T-SRAM based Compute-In-Memory architecture with reconfigurable SAR ADCs for energy-efficient deep neural networks in edge ML applications},
  author = {Avishek Biswas and Hetul Sanghvi and Mahesh Mehendale and G. Preet},
  year = {2022},
  doi = {10.1109/CICC53496.2022.9772789},
  url = {https://doi.org/10.1109/CICC53496.2022.9772789},
  researchr = {https://researchr.org/publication/BiswasSMP22},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2022, Newport Beach, CA, USA, April 24-27, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-0756-4},
}