The detrimental impact of negative Celsius temperature on ultra-low-voltage CMOS logic

David Bol, Cédric Hocquet, Denis Flandre, Jean-Didier Legat. The detrimental impact of negative Celsius temperature on ultra-low-voltage CMOS logic. In 36th European Solid-State Circuits Conference, ESSCIRC 2010, Sevilla, Spain, September 13-17, 2010. pages 522-525, IEEE, 2010. [doi]

Abstract

Abstract is missing.