Table of Contents

• High performance mixed signal: Business and technologyRené Penning de Vries, Hans Rijns, Maarten Vertregt. 1-8 [doi]
• 3D Integration technology: Status and application developmentPeter Ramm, Armin Klumpp, Josef Weber, Nicolas Lietaer, Maaike Taklo, Walter De Raedt, Thomas Fritzsch, Pascal Couderc. 9-16 [doi]
• Engineering hope with biomimetic microelectronic systemsWentai Liu, Zhi Yang. 17-26 [doi]
• Energy harvesting - from devices to systemsYiannos Manoli. 27-36 [doi]
• Technical and economical trends in wireless applicationsMartin Zander. 37-44 [doi]
• FDSOI: From substrate to devices and circuit applicationsCarlos Mazure, Richard Ferrant, Bich-Yen Nguyen, Walter Schwarzenbach, Cécile Moulin. 45-51 [doi]
• Terahertz imaging with CMOS/BiCMOS process technologiesUllrich R. Pfeiffer, Erik Öjefors. 52-60 [doi]
• Analog mixed-signal circuits in advanced nano-scale CMOS technology for microprocessors and SoCsIan A. Young. 61-70 [doi]
• Ultra low power and miniaturized MEMS-based radio for BAN and WSN applicationsDavid Ruffieux, Matteo Contaldo, Jérémie Chabloz, Christian C. Enz. 71-80 [doi]
• A 65-nm CMOS temperature-compensated mobility-based frequency reference for Wireless Sensor NetworksFabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta. 102-105 [doi]
• A temperature compensation word-line voltage generator for multi-level cell NAND Flash memoriesToru Tanzawa, Tomoharu Tanaka, Satoru Tamada, Jiro Kishimoto, Sjigekazu Yamada, Koichi Kawai, Takaaki Ichikawa, P. Chiang, Frank Roohparvar. 106-109 [doi]
• Variability analysis of a digitally trimmable ultra-low power voltage referenceMingoo Seok, Gyouho Kim, David T. Blaauw, Dennis Sylvester. 110-113 [doi]
• A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilitiesTetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa. 114-117 [doi]
• A high PSRR Class-D audio amplifier IC based on a self-adjusting voltage referenceAlexandre Huffenus, Gaël Pillonnet, Nacer Abouchi, Frédéric Goutti, Vincent Rabary, Robert Cittadini. 118-121 [doi]
• A 160×120-pixel uncooled IR-FPA readout integrated circuit with on-chip non-uniformity compensationMatteo Perenzoni, Daniel Mosconi, David Stoppa. 122-125 [doi]
• An ultra-low power current-mode CMOS image sensor with energy harvesting capabilityFang Tang, Yuan Cao 0003, Amine Bermak. 126-129 [doi]
• Large full-well capacity stitched CMOS image sensor for high temperature applicationsDaniel Durini, Frank Matheis, Christian Nitta, Werner Brockherde, Bedrich J. Hosticka. 130-133 [doi]
• A 100dB dynamic range event-driven spatial contrast sensor with 100μs response time and Time-to-First-Spike modeJuan Antonio Leñero-Bardallo, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco. 134-137 [doi]
• A 30µW 100dB contrast vision sensor with sync-async readout and data compressionNicola Massari, Marco De Nicola, Massimo Gottardi. 138-141 [doi]
• A 1.7-mW dual-band CMOS frequency synthesizer for low data-rate sub-GHz applicationsCalogero Marco Ippolito, Alessandro Italia, Giuseppe Palmisano. 142-145 [doi]
• A transmitter CMOS VCO for WCDMA/EDGEPietro Andreani, Kirill Kozmin, Per Sandrup, Thomas Mattsson. 146-149 [doi]
• A 4.1 to 5.1 GHz 430 μA injection-locked frequency divider by 7 in 65 nm CMOSAndrea Bevilacqua, Leonardo Lorenzon, Nicola Da Dalt, Andrea Gerosa, Andrea Neviani. 150-153 [doi]
• An automatic frequency calibration technique for fractional-N frequency synthesizersShih-Hao Tarng, Jia-Hung Peng, Tzu-Chan Chueh, Ming-Ching Kuo. 154-157 [doi]
• A 0.9mW PLL integrated in an ultra-low-power SoC for WPAN and WBAN applicationsGabriele Devita, Alan Chi Wai Wong, Nick Kasparidis, P. Corbishley, Alison J. Burdett, Paul Paddan. 158-161 [doi]
• Low distortion active filters using the Gm-assisted OTA-RC techniqueSiva V. Thyagarajan, Shanthi Pavan, Prabu Sankar. 162-165 [doi]
• A high-linearity low-noise reconfiguration-based programmable gain amplifierHuy-Hieu Nguyen, Hoai-Nam Nguyen, Jeong-Seon Lee, Sang-Gug Lee. 166-169 [doi]
• A 1.8µW 1µV-offset capacitively-coupled chopper instrumentation amplifier in 65nm CMOSQinwen Fan, Fabio Sebastiano, Johan H. Huijsing, Kofi A. A. Makinwa. 170-173 [doi]
• Subthreshold current-mode oscillator-based quantizer with 3-decade scalable sampling rate and pico-Ampere range resolutionArmin Tajalli, Yusuf Leblebici. 174-177 [doi]
• An all-digital A/D converter TAD with 4-shift-clock construction for sensor interface in 0.65-μm CMOSTakamoto Watanabe, Tomohito Terasawa. 178-181 [doi]
• All-digital on-chip monitor for PMOS and NMOS process variability measurement utilizing buffer ring with pulse counterTetsuya Iizuka, Jaehyun Jeong, Toru Nakura, Makoto Ikeda, Kunihiro Asada. 182-185 [doi]
• Low-power fully-integrated K-band transceiver using transformer direct-stacking/connecting and balun signal-combining techniquesNobuhiro Shiramizu, Akihiro Nakamura, Takahiro Nakamura, Toru Masuda, Katsuyoshi Washio. 186-189 [doi]
• A 45-67GHz UWB transmitter with >8dBm output power for indoor radar applicationsHugo Veenstra, Marc Notten, Dixian Zhao, John R. Long. 190-193 [doi]
• A 17-tap 3.5 Gbps finite impulse response pulse shaping filter for 60 GHz transmitter with QPSK modulationJinshu Zhao, Marcus Hellfeld, Thomas Wolf, Frank Ellinger, Le Ye. 194-197 [doi]
• 3GHz, 74mW 2-level Karatsuba 64b Galois field multiplier for public-key encryption acceleration in 45nm CMOSSanu Mathew, Michael E. Kounavis, Farhana Sheikh, Steven Hsu, Amit Agarwal 0001, Himanshu Kaul, Mark Anders, Frank L. Berry, Ram Krishnamurthy. 198-201 [doi]
• FPGA parallel-pipelined AES-GCM core for 100G Ethernet applicationsLuca Henzen, Wolfgang Fichtner. 202-205 [doi]
• A 521-bit dual-field elliptic curve cryptographic processor with power analysis resistanceJen-Wei Lee, Yao-Lin Chen, Chih-Yeh Tseng, Hsie-Chia Chang, Chen-Yi Lee. 206-209 [doi]
• 18Gbps, 50mW reconfigurable multi-mode SHA Hashing accelerator in 45nm CMOSRajaraman Ramanarayanan, Sanu Mathew, Farhana Sheikh, Suresh Srinivasan, Amit Agarwal 0001, Steven Hsu, Himanshu Kaul, Mark Anders, Vasantha Erraguntla, Ram Krishnamurthy. 210-213 [doi]
• A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radiosPieter Harpe, Cui Zhou, Xiaoyan Wang 0002, Guido Dolmans, Harmke de Groot. 214-217 [doi]
• An 11b 60MS/s 2.1mW two-step time-interleaved SAR-ADC with reused S&HSai-Weng Sin, Li Ding, Yan Zhu 0001, He Gong Wei, Chi-Hang Chan, U. Fat Chio, Seng-Pan U, Rui P. Martins, Franco Maloberti. 218-221 [doi]
• A 1.8-V 12-bit 250-MS/s 25-mW self-calibrated DACJen-Hung Chi, Shih-Hsuan Chu, Tsung-Heng Tsai. 222-225 [doi]
• A 94dB-SNR -76dB-THD high-efficiency hybrid audio power-DAC for loudspeaker (4Ω/8Ω) and earphone (16Ω/32Ω)Andrea Baschirotto, G. Bollati, Vittorio Colonna, Gabriele Gandolfi. 226-229 [doi]
• A photovoltaic system with an analog maximum power point tracking technique for 97.3% high effectivenessChun-Yu Hsieh, Chih-Yu Yang, Fu-Kuei Feng, Ke-Horng Chen. 230-233 [doi]
• An electro-magnetic energy harvester with 190nW idle mode power consumption for wireless sensor nodesHannes Reinisch, Stefan Gruber, Martin Wiessflecker, Hartwig Unterassinger, Günter Hofer, Wolfgang Pribyl, Gerald Holweg. 234-237 [doi]
• An integrated 120 volt AC mains voltage interface in standard 130 nm CMOSAndres Tamez, Jeffrey A. Fredenburg, Michael P. Flynn. 238-241 [doi]
• A 9 pW/Hz adjustable clock generator with 3-decade tuning range for dynamic power management in subthreshold SCL systemsArmin Tajalli, Yusuf Leblebici. 242-245 [doi]
• A 60GHz 15.7mW static frequency divider in 90nm CMOSLianming Li, Patrick Reynaert, Michiel Steyaert. 246-249 [doi]
• A comparison between grounded and floating shield inductors for mmW VCOsJosé Luis González 0001, Xavier Aragonès, Marc Molina, Baudouin Martineau, Didier Belot. 250-253 [doi]
• A 40 nm LP CMOS PLL for high-speed mm-wave communicationBertrand Parvais, Karen Scheir, Vojkan Vidojkovic, R. Vandebriel, Gerd Vandersteen, Charlotte Soens, Piet Wambacq. 254-257 [doi]
• A low phase noise, wideband and compact CMOS PLL for use in a heterodyne 802.15.3c TRXDavid Murphy, Qun Jane Gu, Yi-Cheng Wu, Heng-Yu Jian, Zhiwei Xu 0003, Adrian Tang 0002, Frank Wang, Yu-Ling Lin, Ho-Hsian Chen, Chewnpu Jou, Mau-Chung Frank Chang. 258-261 [doi]
• Time-to-digital converter with 3-ps resolution and digital linearization algorithmMarco Zanuso, Salvatore Levantino, Alberto Puggelli, Carlo Samori, Andrea L. Lacaita. 262-265 [doi]
• Time-to-digital converter based on time difference amplifier with non-linearity calibrationShingo Mandai, Tetsuya Iizuka, Toru Nakura, Makoto Ikeda, Kunihiro Asada. 266-269 [doi]
• All digital modulation bandwidth extension technique for narrow bandwidth analog fractional-N PLLPing-Ying Wang, Chia-Huang Fu. 270-273 [doi]
• Ultra low power RC oscillator for system wake-up using highly precise auto-calibration techniqueLim Joonhyung, Lee Kwangmook, Cho Koonsik. 274-277 [doi]
• A 500 mV 650 pW random number generator in 130 nm CMOS for a UWB localization systemChristophe De Roover, Michiel Steyaert. 278-281 [doi]
• A 0.12mm2 7.4μW micropower temperature sensor with an inaccuracy of ±0.2°C (3σ) from -30°C to 125°CKamran Souri, Kofi A. A. Makinwa. 282-285 [doi]
• A 4.3 mm2 ASIC for a 300 °/s 2-axis capacitive micro-gyroscopeLasse Aaltonen, Antti Kalanti, Mika Pulkkinen, Matti Paavola, Mika Kämäräinen, Kari Halonen. 286-289 [doi]
• An interface for eddy current displacement sensors with 15-bit resolution and 20 MHz excitationMohammad Reza Nabavi, Michiel A. P. Pertijs, Stoyan N. Nihtianov. 290-293 [doi]
• A 160×120-pixels range camera with on-pixel correlated double sampling and nonuniformity correction in 29.1µm pitchMatteo Perenzoni, Nicola Massari, David Stoppa, Lucio Pancheri, Mattia Malfatti, Lorenzo Gonzo. 294-297 [doi]
• Range finding sensor in 90nm CMOS with bridge correlator based background light suppressionMilos Davidovic, Gerald Zach, Kerstin Schneider-Hornstein, Horst Zimmermann. 298-301 [doi]
• A 2.4 GHz fully integrated Doherty power amplifier using series combining transformerErcan Kaymaksut, Patrick Reynaert. 302-305 [doi]
• A highly linear 25dBm outphasing power amplifier in 32nm CMOS for WLAN applicationHongtao Xu, Yorgos Palaskas, Ashoke Ravi, Krishnamurthy Soumyanath. 306-309 [doi]
• A Class-D outphasing RF amplifier with harmonic suppression in 90nm CMOSJonas Fritzin, Christer Svensson, Atila Alvandpour. 310-313 [doi]
• 60GHz power amplifier with distributed active transformer and local feedbackYing He, Lianming Li, Patrick Reynaert. 314-317 [doi]
• A low-power orthogonal current-reuse amplifier for parallel sensing applicationsBen Johnson, David DeTomaso, Alyosha C. Molnar. 318-321 [doi]
• 200 μW CMOS class AB unity-gain buffers with accurate quiescent current controlAntonio J. López-Martín, José M. Algueta Miguel, Lucía Acosta, Ramón González Carvajal, Jaime Ramírez-Angulo. 322-325 [doi]
• A 470μW clock-free current-controlled class D amplifier with 0.02% THD+N and 82dB PSRRJoselyn Torres, Adrian Colli-Menchi, Miguel Angel Rojas González, Edgar Sánchez-Sinencio. 326-329 [doi]
• A multi-channel low-power IC for neural spike recording with data compression and narrowband 400-MHz MC-FSK wireless transmissionAndrea Bonfanti, M. Ceravolo, Guido Zambra, Riccardo Gusmeroli, T. Borghi, Alessandro S. Spinelli, Andrea L. Lacaita. 330-333 [doi]
• Micropower integrated bioamplifier and auto-ranging ADC for wireless and implantable medical instrumentationYu M. Chi, Gert Cauwenberghs. 334-337 [doi]
• A DC-isolated fine-controlled neural stimulatorXiao Liu 0001, Andreas Demosthenous, Nick Donaldson. 338-341 [doi]
• A 24 dB gain 51-68 GHz CMOS low noise amplifier using asymmetric-layout transistorsNing Li 0009, Keigo Bunsen, Naoki Takayama, Qinghong Bu, Toshihide Suzuki, Masaru Sato, Tatsuya Hirose, Kenichi Okada, Akira Matsuzawa. 342-345 [doi]
• A 24-GHz 90-nm CMOS beamforming receiver front-end with analog baseband phase rotationAndreas Axholt, Henrik Sjöland. 346-349 [doi]
• A fifth-order 880MHz/1.76GHz active lowpass filter for 60GHz communications in 40nm digital CMOSPiet Wambacq, Vito Giannini, Karen Scheir, Wim Van Thillo, Yves Rolain. 350-353 [doi]
• 0.5-V, 150-MHz, bulk-CMOS SRAM with suspended bit-line read schemeToshikazu Suzuki, Shinichi Moriwaki, Atsushi Kawasumi, Shinji Miyano, Hirofumi Shinohara. 354-357 [doi]
• A 4.4pJ/access 80MHz, 2K word } 64b memory with write masking feature and variability resilient multi-sized sense amplifier redundancy for wireless sensor nodes applicationsVibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene. 358-361 [doi]
• A 40nm CMOS 260kb SRAM-bitcell on-chip failure monitoring test scribe with integer-to-current converterBrice Lhomme, Yann Carminati, Bertrand Borot, Olivier Callen, Thierry Burdeau, Sylvain Clerc. 362-365 [doi]
• Crosshairs SRAM - An adaptive memory for mitigating parametric failuresGregory K. Chen, Michael Wieckowski, David T. Blaauw, Dennis Sylvester. 366-369 [doi]
• A 2.4 GS/s, 4.9 ENOB at Nyquist, single-channel pipeline ADC in 65nm CMOSTimmy Sundström, Christer Svensson, Atila Alvandpour. 370-373 [doi]
• A 11.1-bit ENOB 50-MS/s pipelined A/D converter in 130-nm CMOS without S/H front endJürg Treichler, Qiuting Huang. 374-377 [doi]
• A 12-bit, 30-MS/s, 2.95-mW pipelined ADC using single-stage class-AB amplifiers and deterministic background calibrationJustin Kyung-Ryun Kim, Boris Murmann. 378-381 [doi]
• A reconfigurable 10-12b 0.4-44MS/s pipelined ADC with 0.35-0.5pJ/step in 1.2V 90nm digital CMOSMohammad Taherzadeh-Sani, Anas A. Hamoui. 382-385 [doi]
• Enabling multiple robotic functions in an endoscopic capsule for the entire gastrointestinal tract explorationOscar Alonso, Joan Canals, Lluis Freixas, Josep Samitier, Ángel Diéguez, Monica Vatteroni, Ekawahyu Susilo, Carmen Cavallotti, Pietro Valdastri. 386-389 [doi]
• Digital potentiostat for electrochemical bio sensor chipsAlexander Frey, P. Kruppa, Ingo Kuehne, Meinrad Schienle, N. Persike, G. Hartwich, H. Seidel. 390-393 [doi]
• A quadrature receiver for μNMR applications in 0.13μm CMOSJens Anders, Paul SanGiorgio, Giovanni Boero. 394-397 [doi]
• A 900μW, 3-5GHz integrated FM-UWB transmitter in 90nm CMOSNitz Saputra, John R. Long, John J. Pekarik. 398-401 [doi]
• A sub-3dB NF voltage-sampling front-end with +18dBm IIP3 and +2dBm blocker compression pointJonathan Borremans, Gunjan Mandal, Björn Debaillie, Vito Giannini, Jan Craninckx. 402-405 [doi]
• A 0.1-4GHz resistive feedback LNA with feedforward noise and distortion cancelationXiao Wang, Wolfgang Aichholzer, Johannes Sturm. 406-409 [doi]
• Reliability assessment of voltage controlled oscillators in 32nm high-κ metal gate technologyFlorian Chouard, Michael Fulde, Doris Schmitt-Landsiedel. 410-413 [doi]
• A 0.13µm CMOS 0.1-20MHz bandwidth 86-70dB DR multi-mode DT ΔΣ ADC for IMT-AdvancedThomas Christen, Qiuting Huang. 414-417 [doi]
• A 100kHz-10MHz BW, 78-to-52dB DR, 4.6-to-11mW flexible SC ΣΔ modulator in 1.2-V 90-nm CMOSAlonso Morgado, Rocío Del Río, José Manuel de la Rosa, Lynn Bos, Julien Ryckaert, Geert Van der Plas. 418-421 [doi]
• A digitally calibrated 5-mW 2-MS/s 4th-order ΔΣ ADC in 0.25-μm CMOS with 94 dB SFDRKerry A. O'Donoghue, Paul J. Hurst, Stephen H. Lewis. 422-425 [doi]
• A configurable cascaded continuous-time ΔΣ modulator with up to 15MHz bandwidthJens Sauerbrey, Jacinto San Pablo Garcia, Georgi Panov, Thomas Piorek, Xianghua Shen, Markus Schimper, Rudolf Koch, Matthias Keller, Yiannos Manoli, Maurits Ortmanns. 426-429 [doi]
• A 0.08 mm2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOSEnrique Prefasi, Susana Patón, Luis Hernández, Richard Gaggl, Andreas Wiesbauer, Joerg Hauptmann. 430-433 [doi]
• A fully integrated 74% efficiency 3.6V to 1.5V 150mW capacitive point-of-load DC/DC-converterTom Van Breussegem, Michiel Steyaert. 434-437 [doi]
• An 8W-2MHz buck converter with adaptive dead time tolerant to radiation and high magnetic fieldStefano Michelis, B. Allongue, G. Blanchot, Simone Buso, Federico Faccio, C. Fuentes, A. Marchioro, S. Orlandi, Stefano Saggini, Giorgio Spiazzi, Maher Kayal. 438-441 [doi]
• A sensor concept for minimizing body diode conduction losses in DC/DC convertersGerhard Maderbacher, Thomas Jackum, Wolfgang Pribyl, Christoph Sandner. 442-445 [doi]
• A single-inductor multiple positive and negative outputs (SIMPNO) converter with a vector current control mode for electronic paper displays (EPDs)Yu-Huei Lee, Ming-Hsin Huang, Yu-Nong Tsai, Ming-Yan Fan, Ke-Horng Chen. 446-449 [doi]
• Efficiency enhanced Single-Inductor Boost-Inverting Flyback converter with Dual Hybrid Energy transfer media and a Bifurcation Free ComparatorSe-Won Wang, Young-Jin Woo, Young-sub Yuk, Byunghun Lee, Gyu-Hyeong Cho, Gyu-Ha Cho. 450-453 [doi]
• A 2×2 MIMO tri-band dual-mode CMOS transceiver for worldwide WiMAX/WLAN applicationsKyoohyun Lim, Sunki Min, Sanghoon Lee, Jaewoo Park, Kisub Kang, Hwahyeong Shin, Hyunchul Shim, Sechang Oh, Sungho Kim, Jong-Ryul Lee, Changsik Yoo, Kukjin Chun. 454-457 [doi]
• A 0.8V 2.4GHz 1Mb/s GFSK RF transceiver with on-chip DC-DC converter in a standard 0.18µm CMOS technologyPaulo Augusto Dal Fabbro, Tindaro Pittorino, Christoph Kuratli, Robert Kvacek, Martin Kucera, Frédéric Giroud, Steve Tanner, Frédéric Chastellain, Arnaud Casagrande, Arthur Descombes, Vincent Peiris, Pierre-André Farine, Maher Kayal. 458-461 [doi]
• A 500mW 5Mbps ULP super-regenerative RF front-endMaja Vidojkovic, Simonetta Rampu, Koji Imamura, Pieter Harpe, Guido Dolmans, Harmke de Groot. 462-465 [doi]
• A 900-MHz bandwidth analog baseband circuit with 1-dB step and 30-dB gain dynamic rangeMasahiro Hosoya, Toshiya Mitomo, Osamu Watanabe 0003. 466-469 [doi]
• A low-cost and low-power single-chip DAB+/DAB/FM receiverJ. C. Hsu, C. Y. Chou, S. W. Chang, Albert Tseng. 470-473 [doi]
• 0.5V FinFET SRAM with dynamic threshold control of pass gates for salvaging malfunctioned bitsShin-ichi O'Uchi, Kazuhiko Endo, Yongxun Liu, Tadashi Nakagawa, Takashi Matsukawa, Yuki Ishikawa, Junichi Tsukada, Hiromi Yamauchi, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara. 474-477 [doi]
• A 4 Megabit Carbon Nanotube-based nonvolatile memory (NRAM)Glen Rosendale, Sohrab Kianian, Monte Manning, Darlene Hamilton, Henry Huang, Karl Robinson, Young Weon Kim, Thomas Rueckes. 478-481 [doi]
• A highly reliable multi-cell antifuse scheme using DRAM cell capacitorsJong-Pil Son, Jin-Ho Kim, Woo Song Ahn, Seung Uk Han, Byung-Sick Moon, Churoo Park, Hong-Sun Hwang, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Soo-Won Kim. 482-485 [doi]
• Terahertz imaging detectors in a 65-nm CMOS SOI technologyErik Öjefors, Neda Baktash, Yan Zhao, Richard Al Hadi, Hani Sherry, Ullrich R. Pfeiffer. 486-489 [doi]
• Low power and high gain double-balanced mixer dedicated to 77 GHz automotive radar applicationsAndre A. Mariano, Thierry Taris, Bernardo Leite, Cédric Majek, Yann Deval, Eric Kerherve, Jean-Baptiste Begueret, Didier Belot. 490-493 [doi]
• A 117mW 77GHz receiver in 65nm CMOS with ladder structured tunable VCORoc Berenguer, Gui Liu, Abe Akhiyat, Keya Kamtikar, Yang Xu. 494-497 [doi]
• A 5Mb/s UWB-IR CMOS transceiver with a 186 pJ/b and 150 pJ/b TX/RX energy requestSilvia Soldà, Michele Caruso, Andrea Bevilacqua, Andrea Gerosa, Daniele Vogrig, Andrea Neviani. 498-501 [doi]
• A 1 nJ/b 3.2-to-4.7 GHz UWB 50 Mpulses/s double quadrature receiver for communication and localizationGilles Masson, Dominique Morche, Hélène Jacquinot, Pierre Vincent, François Dehmas, Stéphane Paquelet, Alexis Bisiaux, Olivier Fourquin, Jean Gaubert, Sylvain Bourdel. 502-505 [doi]
• RF spectrum sensing technique for cognitive UWB radio networkMuhammad Anis, Maurits Ortmanns, Norbert Wehn. 506-509 [doi]
• An organic integrated capacitive DC-DC up-converterHagen Marien, Michiel Steyaert, Soeren Steudel, Peter Vicca, Steve Smout, Gerwin H. Gelinck, Paul Heremans. 510-513 [doi]
• A loading effect insensitive and high precision clock synchronization circuitKai-Wei Hong, Kuo-Hsing Cheng, Chi-Hsiang Chen, Jen-Chieh Liu, Chien-Cheng Chen. 514-517 [doi]
• Glitch-induced within-die variations of dynamic energy in voltage-scaled nano-CMOS circuitsDina Kamel, Cédric Hocquet, François-Xavier Standaert, Denis Flandre, David Bol. 518-521 [doi]
• The detrimental impact of negative Celsius temperature on ultra-low-voltage CMOS logicDavid Bol, Cédric Hocquet, Denis Flandre, Jean-Didier Legat. 522-525 [doi]
• An energy-efficient biomedical signal processing platformJoyce Kwong, Anantha P. Chandrakasan. 526-529 [doi]
• A 757Mb/s 1.5 mm2 90nm CMOS soft-input soft-output MIMO detector for IEEE 802.11nChristoph Studer, Schekeb Fateh, Dominik Seethaler. 530-533 [doi]
• A 2.17 mm2 125 mW reconfigurable SVD chip for IEEE 802.11n systemYen-Liang Chen, Ting-Jyun Jheng, Cheng-Zhou Zhan, An-Yeu Wu. 534-537 [doi]
• Low-power word-parallel nearest-Hamming-distance search circuit based on frequency mappingHans Jürgen Mattausch, Wataru Imafuku, Tania Ansari, Akio Kawabata, Tetsushi Koide. 538-541 [doi]
• A 5.5 Gbit/s optical receiver in 130 nm CMOS with speed-enhanced integrated photodiodeFilip Tavernier, Michiel Steyaert. 542-545 [doi]
• A CMOS adaptive equalizer using low-voltage zero generators techniqueYu-Chang Tsai, Kuo-Hsing Cheng, Yen-Hsueh Wu, Ying-Fu Lin. 546-549 [doi]
• A 10 Gb/s adaptive analog decision feedback equalizer for multimode fiber dispersion compensation in 0.13 µm CMOSMahyar Kargar, Michael M. Green. 550-553 [doi]
• A 0.18-µm CMOS 1.25-Gbps front-end receiver for low-cost short reach optical communicationsFrancisco Aznar, Santiago Celma, Belén Calvo. 554-557 [doi]