Anas A. Hamoui - researchr alias

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Viewing Publication 1 - 32 from 32

2014

Design and Verification of a Switchable Opamp for Switched-Capacitor IntegratorsMostafa A. N. Haroun, Anas A. Hamoui. tcas, 61-II(10):738-742, 2014. [doi]

A current-output DAC for low-power low-noise log-domain ΔΣ modulatorsMohamed A. Shaheen, Anas A. Hamoui, Yvon Savaria. newcas 2014: 281-284 [doi]

2013

2012

A Spurious-Free Switching Buck Converter Achieving Enhanced Light-Load Efficiency by Using a ΔΣ-Modulator Controller With a Scalable Sampling FrequencyMohammad K. Alghamdi, Anas A. Hamoui. jssc, 47(4):841-851, 2012. [doi]

Correction to "A 1-V Process-Insensitive Current-Scalable Two-Stage Opamp With Enhanced DC Gain and Settling Behavior in 65-nm Digital CMOS" [Mar 11 660-668]Mohammad Taherzadeh-Sani, Anas A. Hamoui. jssc, 47(6):1497, 2012. [doi]

2011

A 1V 13mW frequency-translating ΔΣ ADC with 55dB SNDR for a 4MHz band at 225MHzPhilip M. Chopp, Anas A. Hamoui. cicc 2011: 1-4 [doi]

A 1-V Process-Insensitive Current-Scalable Two-Stage Opamp With Enhanced DC Gain and Settling Behavior in 65-nm Digital CMOSMohammad Taherzadeh-Sani, Anas A. Hamoui. jssc, 46(3):660-668, 2011. [doi]

2010

Guest Editorial - Selected Papers From the 2010 IEEE International Solid-State Circuits Conference (ISSCC)Anas A. Hamoui, H.-J. Yoo. tbcas, 4(6):337-339, 2010. [doi]

A reconfigurable 10-12b 0.4-44MS/s pipelined ADC with 0.35-0.5pJ/step in 1.2V 90nm digital CMOSMohammad Taherzadeh-Sani, Anas A. Hamoui. esscirc 2010: 382-385 [doi]

Area and Power Optimization of High-Order Gain Calibration in Digitally-Enhanced Pipelined ADCsMohammad Taherzadeh-Sani, Anas A. Hamoui. tvlsi, 18(4):652-657, 2010. [doi]

2009

Design Constraints for Image-Reject Frequency-Translating Delta Sigma ModulatorsPhilip M. Chopp, Anas A. Hamoui. tcas, 56-II(12):896-900, 2009. [doi]

Analysis of Clock-Jitter Effects in Continuous-Time Delta Sigma Modulators Using Discrete-Time ModelsPhilip M. Chopp, Anas A. Hamoui. tcas, 56-I(6):1134-1145, 2009. [doi]

2008

2007

Discrete-Time Modeling of Clock Jitter in Continuous-Time Delta Sigma ModulatorsPhilip M. Chopp, Anas A. Hamoui. iscas 2007: 497-500 [doi]

Power Optimization of Pipelined ADCs with High-Order Digital Gain CalibrationMohammad Taherzadeh-Sani, Anas A. Hamoui. icecsys 2007: 661-664 [doi]

2006

2004

High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling ΔΣ ADCs for broad-band applicationsAnas A. Hamoui, Kenneth W. Martin. tcas, 51-I(1):72-85, 2004. [doi]

2003

A 1.8-V 3-MS/s 13-bit ΔΣ A/D converter with pseudo data-weighted-averaging in 0.18-μm digital CMOSAnas A. Hamoui, Kenneth W. Martin. cicc 2003: 119-122 [doi]

A low-voltage fully-monolithic ΔΣ-based class-D audio amplifierJorge Varona, Anas A. Hamoui, Kenneth W. Martin. esscirc 2003: 545-548 [doi]

2002

Linearity enhancement of multibit Delta-Sigma modulators using pseudo data-weighted averagingAnas A. Hamoui, K. Martin. iscas 2002: 285-288 [doi]

1999

An analytical current, delay, and power model for the submicron CMOS inverterAnas A. Hamoui, Nicholas C. Rumin. icecsys 1999: 1547-1551 [doi]

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