Nicholas C. Rumin - researchr alias

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Viewing Publication 1 - 20 from 20

2005

Explicit delay metric for interconnect optimizationMin Ma, Mourad Oulmane, Nicholas C. Rumin. iscas 2005: 2453-2456 [doi]

2001

Delay and current estimation in a CMOS inverter with an RC loadMohamed Hafed, Mourad Oulmane, Nicholas C. Rumin. tcad, 20(1):80-89, 2001. [doi]

1999

An analytical current, delay, and power model for the submicron CMOS inverterAnas A. Hamoui, Nicholas C. Rumin. icecsys 1999: 1547-1551 [doi]

1996

Bounding Switching Activity in CMOS Circuits Using Constraint ResolutionJindrich Zejda, Eduard Cerny, S. Shenoy, Nicholas C. Rumin. date 1996: 294-301 [doi]

1994

Inverter models of CMOS gates for supply current and delay evaluationAbdolreza Nabavi-Lishi, Nicholas C. Rumin. tcad, 13(10):1271-1279, 1994. [doi]

Inverter-based Models for Current Analysis of CMOS Logic CircuitsAbdolreza Nabavi-Lishi, Nicholas C. Rumin. iscas 1994: 13-16

1993

Delay prediction from resistance-capacitance models of general MOS circuitsDenis Martin, Nicholas C. Rumin. tcad, 12(7):997-1003, 1993. [doi]

1992

Accuracy of magnitude-class calculations in switch-level modelingEduard Cerny, John P. Hayes, Nicholas C. Rumin. tcad, 11(4):443-452, 1992. [doi]

Transistor-level estimation of worst-case delays in MOS VLSI circuitsMichel Dagenais, Serge Gaiotti, Nicholas C. Rumin. tcad, 11(3):384-395, 1992. [doi]

Delay and bus current evaluation in CMOS logic circuitsAbdolreza Nabavi-Lishi, Nicholas C. Rumin. iccad 1992: 198-203 [doi]

1991

A recursive technique for computing delays in series-parallel MOS transistor circuitsJean Paul Caisso, Eduard Cerny, Nicholas C. Rumin. tcad, 10(5):589-595, 1991. [doi]

1989

Magnitude classes in switch-level modelingEduard Cerny, John P. Hayes, Nicholas C. Rumin. iccd 1989: 284-288 [doi]

On the calculation of optimal clocking parameters in synchronous circuits with level-sensitive latchesMichel Dagenais, Nicholas C. Rumin. tcad, 8(3):268-278, 1989. [doi]

Worst-case Delay Estimation of Transistor GroupsSerge Gaiotti, Michel Dagenais, Nicholas C. Rumin. dac 1989: 491-495 [doi]

1988

Delay computation in switch-level models of non-treelike MOS circuitsDenis Martin, Nicholas C. Rumin. iccad 1988: 358-361 [doi]

1986

1985

The McBOOLE logic minimizerMichel Dagenais, Vinod K. Agarwal, Nicholas C. Rumin. dac 1985: 667-673 [doi]

1984

A Design for Machines with Built-In Tolerance to Soft ErrorsYvon Savaria, Vinod K. Agarwal, Nicholas C. Rumin, Jeremiah F. Hayes. itc 1984: 649-659

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