An FPGA-based implementation of the MINRES algorithm - researchr publication authors

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David Boland, George A. Constantinides. An FPGA-based implementation of the MINRES algorithm. In FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008. pages 379-384, IEEE, 2008. [doi]

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