Cristiana Bolchini, Luca Cassano, Andrea Mazzeo, Antonio Miele. Error Modeling for Image Processing Filters accelerated onto SRAM-based FPGAs. In 26th IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2020, Napoli, Italy, July 13-15, 2020. pages 1-6, IEEE, 2020. [doi]
Abstract is missing.