Cost-efficient FPGA layered LDPC decoder with serial AP-LLR processing

Oana Boncalo, Alexandru Amaricai, Andrei Hera, Valentin Savin. Cost-efficient FPGA layered LDPC decoder with serial AP-LLR processing. In 24th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 2-4 September, 2014. pages 1-6, IEEE, 2014. [doi]

Abstract

Abstract is missing.