FPGA based Embedded Processing Architecture for the QRD-RLS Algorithm

Deepak Boppana, Kully Dhanoa, Jesse Kempa. FPGA based Embedded Processing Architecture for the QRD-RLS Algorithm. In 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, CA, Proceedings. pages 330-331, IEEE Computer Society, 2004. [doi]

@inproceedings{BoppanaDK04,
  title = {FPGA based Embedded Processing Architecture for the QRD-RLS Algorithm},
  author = {Deepak Boppana and Kully Dhanoa and Jesse Kempa},
  year = {2004},
  url = {http://csdl.computer.org/comp/proceedings/fccm/2004/2230/00/22300330abs.htm},
  tags = {rule-based, architecture},
  researchr = {https://researchr.org/publication/BoppanaDK04},
  cites = {0},
  citedby = {0},
  pages = {330-331},
  booktitle = {12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, CA, Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2230-0},
}