Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint

Manjit Borah, Robert Michael Owens, Mary Jane Irwin. Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint. In Massoud Pedram, Robert W. Brodersen, Kurt Keutzer, editors, Proceedings of the 1995 International Symposium on Low Power Design 1995, Dana Point, California, USA, April 23-26, 1995. pages 167-172, ACM, 1995. [doi]

Abstract

Abstract is missing.