An approach to Verilog-VHDL interoperability for synchronous designs - researchr publication authors

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Dominique Borrione, F. Vestman, H. Bouamama. An approach to Verilog-VHDL interoperability for synchronous designs. In Hon F. Li, David K. Probst, editors, Advances in Hardware Design and Verification, IFIP WG 10.5 International Conference on Correct Hardware Design and Verification Methods, 16-18 October 1997, Montréal, Québec, Canada. Volume 105 of IFIP Conference Proceedings, pages 65-87, Chapman & Hall, 1997.

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