Path delay fault simulation of sequential circuits

Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal. Path delay fault simulation of sequential circuits. IEEE Trans. VLSI Syst., 1(4):453-461, 1993. [doi]

@article{BoseAA93:1,
  title = {Path delay fault simulation of sequential circuits},
  author = {Soumitra Bose and Prathima Agrawal and Vishwani D. Agrawal},
  year = {1993},
  doi = {10.1109/92.250193},
  url = {http://doi.ieeecomputersociety.org/10.1109/92.250193},
  researchr = {https://researchr.org/publication/BoseAA93%3A1},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {1},
  number = {4},
  pages = {453-461},
}