Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi. SoC Symbolic Simulation: a case study on delay fault testing. In Bernd Straube, Milos Drutarovský, Michel Renovell, Peter Gramata, Mária Fischerová, editors, Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008. pages 320-325, IEEE Computer Society, 2008. [doi]
Abstract is missing.