G. Fraidy Bouesse, Marc Renaudin, Gilles Sicard. Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals. In Ricardo Augusto da Luz Reis, Adam Osseiran, Hans-Jörg Pfleiderer, editors, VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia. Volume 240 of IFIP, pages 11-24, Springer, 2005. [doi]
@inproceedings{BouesseRS05, title = {Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals}, author = {G. Fraidy Bouesse and Marc Renaudin and Gilles Sicard}, year = {2005}, doi = {10.1007/978-0-387-73661-7_2}, url = {http://dx.doi.org/10.1007/978-0-387-73661-7_2}, researchr = {https://researchr.org/publication/BouesseRS05}, cites = {0}, citedby = {0}, pages = {11-24}, booktitle = {VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia}, editor = {Ricardo Augusto da Luz Reis and Adam Osseiran and Hans-Jörg Pfleiderer}, volume = {240}, series = {IFIP}, publisher = {Springer}, isbn = {978-0-387-73660-0}, }