G. Fraidy Bouesse, Marc Renaudin, Gilles Sicard. Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals. In Ricardo Augusto da Luz Reis, Adam Osseiran, Hans-Jörg Pfleiderer, editors, VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia. Volume 240 of IFIP, pages 11-24, Springer, 2005. [doi]
Abstract is missing.