Identification of Single Gate Delay Fault Redundancies

Daniel Brand, Vijay S. Iyengar. Identification of Single Gate Delay Fault Redundancies. In Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD 92, Cambridge, MA, USA, October 11-14, 1992. pages 24-28, IEEE Computer Society, 1992.

Abstract

Abstract is missing.