Sub-70 PS full adder IN 0.18 µm CMOS current-mode logic

Elizabeth J. Brauer, Yusuf Leblebici. Sub-70 PS full adder IN 0.18 µm CMOS current-mode logic. In M. H. Rashid, editor, Proceedings of the Second IASTED International Conference on Circuits, Signals, and Systems, Clearwater Beach, FL, USA, November 28, 2004 - December 1, 2004. pages 483-487, IASTED/ACTA Press, 2004.

Authors

Elizabeth J. Brauer

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Yusuf Leblebici

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