Elizabeth J. Brauer, Yusuf Leblebici. Sub-70 PS full adder IN 0.18 µm CMOS current-mode logic. In M. H. Rashid, editor, Proceedings of the Second IASTED International Conference on Circuits, Signals, and Systems, Clearwater Beach, FL, USA, November 28, 2004 - December 1, 2004. pages 483-487, IASTED/ACTA Press, 2004.
@inproceedings{BrauerL04a,
title = {Sub-70 PS full adder IN 0.18 µm CMOS current-mode logic},
author = {Elizabeth J. Brauer and Yusuf Leblebici},
year = {2004},
tags = {logic},
researchr = {https://researchr.org/publication/BrauerL04a},
cites = {0},
citedby = {0},
pages = {483-487},
booktitle = {Proceedings of the Second IASTED International Conference on Circuits, Signals, and Systems, Clearwater Beach, FL, USA, November 28, 2004 - December 1, 2004},
editor = {M. H. Rashid},
publisher = {IASTED/ACTA Press},
}