Juraj Brenkus, Viera Stopjaková, Gábor Gyepes. Numerical method for DC fault analysis simplification and simulation time reduction. In Lukás Sekanina, Görschwin Fey, Jaan Raik, Snorre Aunet, Richard Ruzicka, editors, 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2013, Karlovy Vary, Czech Republic, April 8-10, 2013. pages 170-174, IEEE Computer Society, 2013. [doi]
Abstract is missing.