A memory mapping approach for network and controller optimization in parallel interleaver architectures

Aroua Briki, Cyrille Chavet, Philippe Coussy. A memory mapping approach for network and controller optimization in parallel interleaver architectures. In José Luis Ayala, Alex K. Jones, Patrick H. Madden, Ayse Kivilcim Coskun, editors, Great Lakes Symposium on VLSI 2013 (part of ECRC), GLSVLSI'13, Paris, France, May 2-4, 2013. pages 321-322, ACM, 2013. [doi]

Abstract

Abstract is missing.