A 4 Bit Continuous-Time ΣΔ Modulator With Fully Digital Quantization Noise Reduction Algorithm Employing a 7 Bit Quantizer

Carlos Briseno-Vidrios, Alexander Edward, Negar Rashidi, José Silva-Martínez. A 4 Bit Continuous-Time ΣΔ Modulator With Fully Digital Quantization Noise Reduction Algorithm Employing a 7 Bit Quantizer. J. Solid-State Circuits, 51(6):1398-1409, 2016. [doi]

Abstract

Abstract is missing.