Philip Brisk, Ajay K. Verma, Paolo Ienne. An Optimal Linear-Time Algorithm for Interprocedural Register Allocation in High Level Synthesis Using SSA Form. IEEE Trans. on CAD of Integrated Circuits and Systems, 29(7):1096-1109, 2010. [doi]
@article{BriskVI10,
title = {An Optimal Linear-Time Algorithm for Interprocedural Register Allocation in High Level Synthesis Using SSA Form},
author = {Philip Brisk and Ajay K. Verma and Paolo Ienne},
year = {2010},
doi = {10.1109/TCAD.2010.2049060},
url = {http://dx.doi.org/10.1109/TCAD.2010.2049060},
researchr = {https://researchr.org/publication/BriskVI10},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {29},
number = {7},
pages = {1096-1109},
}