Enhancing FPGA Performance for Arithmetic Circuits

Philip Brisk, Ajay K. Verma, Paolo Ienne, Hadi Parandeh-Afshar. Enhancing FPGA Performance for Arithmetic Circuits. In Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007. pages 334-337, IEEE, 2007. [doi]

Authors

Philip Brisk

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Ajay K. Verma

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Paolo Ienne

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Hadi Parandeh-Afshar

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