A configurable architecture to limit wakeup current in dynamically-controlled power-gated FPGAs

Assem A. M. Bsoul, Steven J. E. Wilton. A configurable architecture to limit wakeup current in dynamically-controlled power-gated FPGAs. In Katherine Compton, Brad L. Hutchings, editors, Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, FPGA 2012, Monterey, California, USA, February 22-24, 2012. pages 245-254, ACM, 2012. [doi]

Abstract

Abstract is missing.