A reconfigurable VLSI coprocessing system for the block matching algorithm

A. Bugeja, W. Yang. A reconfigurable VLSI coprocessing system for the block matching algorithm. IEEE Trans. VLSI Syst., 5(3):329-337, 1997. [doi]

@article{BugejaY97,
  title = {A reconfigurable VLSI coprocessing system for the block matching algorithm},
  author = {A. Bugeja and W. Yang},
  year = {1997},
  doi = {10.1109/92.609876},
  url = {http://doi.ieeecomputersociety.org/10.1109/92.609876},
  researchr = {https://researchr.org/publication/BugejaY97},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {5},
  number = {3},
  pages = {329-337},
}