Frank P. Burns, Delong Shang, Albert Koelmans, Alexandre Yakovlev. An Asynchronous Synthesis Toolset Using Verilog. In 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France. pages 724-725, IEEE Computer Society, 2004. [doi]
@inproceedings{BurnsSKY04,
title = {An Asynchronous Synthesis Toolset Using Verilog},
author = {Frank P. Burns and Delong Shang and Albert Koelmans and Alexandre Yakovlev},
year = {2004},
url = {http://csdl.computer.org/comp/proceedings/date/2004/2085/01/208510724abs.htm},
researchr = {https://researchr.org/publication/BurnsSKY04},
cites = {0},
citedby = {0},
pages = {724-725},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France},
publisher = {IEEE Computer Society},
isbn = {0-7695-2085-5},
}