Zhimei Cai, Zhiyong Han, Ming Tian, Changfeng Wang, Xiaoming Hu, Ran Cheng, Yi Zhao. Variation Analysis of Interconnect Capacitance and Process Corner in Advanced CMOS Process with Double Patterning Technology. In 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019. pages 1-4, IEEE, 2019. [doi]
Abstract is missing.