Comparative evaluation of FPGA and ASIC implementations of bufferless and buffered routing algorithms for on-chip networks

Yu Cai, Ken Mai, Onur Mutlu. Comparative evaluation of FPGA and ASIC implementations of bufferless and buffered routing algorithms for on-chip networks. In Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015. pages 475-484, IEEE, 2015. [doi]

@inproceedings{CaiMM15,
  title = {Comparative evaluation of FPGA and ASIC implementations of bufferless and buffered routing algorithms for on-chip networks},
  author = {Yu Cai and Ken Mai and Onur Mutlu},
  year = {2015},
  doi = {10.1109/ISQED.2015.7085472},
  url = {http://dx.doi.org/10.1109/ISQED.2015.7085472},
  researchr = {https://researchr.org/publication/CaiMM15},
  cites = {0},
  citedby = {0},
  pages = {475-484},
  booktitle = {Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-7581-5},
}